Currently, lead frame packages are used in a wide range of electronic device implementations. They have a number of attractive properties that have lead to their wide use in the industry.
Currently, a number of modes are used to bond semiconductor die to their associated lead frames. In one example, a copper lead frame is used and a die with a copper bond pad is used in conjunction with a lead-free solder ball to adhere the die and lead frame. Additionally, such processes require additional UBM (under bump metallurgy) and are not applicable to standard die with aluminum bond pads.
In an effort to address this problem, the current art uses a laminated multi-layer bond pad on the die to enable a lead free solder process. In one example, the aluminum pad of the die is treated with nickel to form a first layer. This nickel layer is then treated with copper to form the final bond pad having a copper bonding surface. Although relatively suitable for use such structures are expensive to manufacture, adding $40-60 to the cost of each wafer.
It is pointed out that this prior art structure suffer from a serious set of problems, which is illustrated schematically by FIGS. 1A & 1B.
FIG. 1A shows a simple figurative illustration of a common solder ball construction. A substrate 102 having several bond pads 103 (in this case say copper pads) has a die 101 mounted thereon. Typically, the die 101 is electrically connected with the substrate 102 (another die, a circuit board, a lead frame, etc.) using a set of solder balls 104 that provide the electrical connections. An example of such balls 104 can be lead-free balls adhered to bond pads 107 of the die. In one example, the solder can be a tin/silver/copper solder. In this example, the balls 104 are a standard 280 μm (micrometer) diameter solder balls. Here the balls 104 are configured with a standard ball pitch of about 500 μm. Dashed line 105 schematically represents a current path through the electrical system depicted. The circled areas 106 represent areas of current crowding. As such, these areas are most vulnerable to the effects of electromigration related circuit failure.
Ordinarily, balls 104 of this type can carry between 1-2 A of current with a relatively low inductance. However, such balls are subject to a number of electromigration related failures. FIG. 1B provides a simple illustration of one such type of failure. This view is an expanded view of an example region 106 of FIG. 1A. These regions are subject to current crowding and attendant high current densities. Over time the ball 104 can separate from the associated bond pad 107. In this depiction the separation 111 slowly restricts the flow of the current to areas of good conduction 112. However, over time the current density increases in region 112. As a result, the rate of electromigration increases. Additionally, as the size of conduction path 112 decreases, the level of current that can be carries tends to decrease. This causes a lowering of the current causing associated circuit elements to fail.
So-called “gold-on-gold” technologies have been in use for some time. These processes require the treatment of die and substrate contacts as well as lead frames to form gold bonding surfaces which are adhered to gold connectors (hence the name “gold-on-gold”). Although reasonably effective as connections, these “gold-on-gold” connectors are not readily usable with standard “off-the shelf” lead frames and IC die. For example, leadframe bonding surfaces must be treated with various intermediate layers to provide the necessary gold bonding surfaces. This is expensive and time consuming, and in some cases, not easily integrate into existing process flows.
It is pointed out that all of these techniques have their shortcomings and have been in existence for decades despite the cost and complexity problems and despite the long recognized need for a better solution. In particular, the industry has been seeking a low cost solution to the problems described above.
Thus, while existing systems and methods work well for many applications, there is an increasing demand for an apparatus and fabrication method that enable the construction of improved flip chip packages and improved lead frame connectors. This disclosure addresses some of those needs.